Traps and Their Impact on N-Polar GaN HEMTs

Abstract

A 36-month basic research program is proposed to investigate traps in GaN high electron mobility transistors (HEMTs); help optimizeN-polar GaN HEMT growth, processing and design; identify the physical sources of the traps; identify the stressors that cause trap activation/formation that lead to degradation in N-polar HEMTs; investigate traps in Ga-polar GaN HEMTs on alternative substrates; and investigate different device structures to minimize the influence of buffer-related traps on the transistor performance and stability. Each of these things will delay insertion into DoD platforms and need to be resolved quickly. Traps are known to cause many problems in GaN HEMTs including threshold voltage instability, knee walkout, current collapse, and reduced transconductance, for example. N-polar HEMTs have many potential advantages over more developed Ga-polar devices due to the opposite polarization that enables different device structures that enable lower contact resistance, better two-dimensional electron gas confinement, more effectively highly-scale geometries, higher operating frequencies, and higher power densities. Thus, we will focus on these devices but also look at Ga-polar devices where lessons learned would generally apply to all GaN HEMTs. Ultimately, the goal is to grow and design HEMTs without any time- and bias-dependent instabilities and that do not suffer from any trap-related degradation. We will work with multiple partners from universities, commercial entities, and national labs to provides samples and collaborative research to complement our suite of defect spectroscopy measurements. At OSU, we will primarily use our conventional deep level transient and optical spectroscopies (DLTS/DLOS) for materials and interface research, constant drain current (CID-) DLTS and DLOS to quantitatively characterize traps in HEMTs, and current-voltage measurements for diode, metal-insulator-semiconductor, and transistor characterization. We will apply these techniques to help optimize N-polar HEMTs, understand gate leakage differences between Ga- and N-polar HEMTs, investigate trap evolution during accelerated life testing, investigate methods to screen buffer traps, and the role of alternative substrates on trap incorporation.

Document Details

Document Type
DoD Grant Award
Publication Date
Jul 24, 2023
Source ID
N000142312642

Entities

People

  • Aaron R. Arehart

Organizations

  • Office of Naval Research
  • Ohio State University
  • United States Navy

Tags

Fields of Study

  • Engineering

Readers

  • Semiconductor Device Technology

Technology Areas

  • Microelectronics