Self-Healing Hardware with Chiplet-based Architectures
Abstract
Self-healing designs augment the computer security defender systems by adapting a security compromised system for continued operation (availability). However, it is important to note that there are several efficiency-related considerations in their designs beforethey can be widelyadopted, especially within mission-critical systems. Hardware-assisted fault monitoring and efficient micro-booting of applications can serve to significantly improve the usefulness of self healing system designs. Therefore, hardware architectures have the enormous potential to play aconstructive role in realizing efficient and practical self-healing systems. In particular, the recently emerging chiplet-based architectures achieve efficiency and versatility by combining multiple smaller chips using high-bandwidth on-chip networks into a single logical processor.In this proposal, our main objective is to explore self-healing hardware designs that leverage chiplet-based architectures and keep the system#s mission-critical functions to be operational during and after the security attacks. We propose a framework, SHARC (Self-Healing Architecturewith Reconfiguring Chiplets) that leverages the hardware chiplet domains smartly to achieve selfhealing functions. Our proposal will study a combination of both the hardware design-time opportunities and runtime adaptation methods to achieve performant self-healing architectures.Note that the current chiplet hardware design methodologies are largely optimized for performance and power considerations, and are rarely studied for how to survive during and after security attacks (self-healing to increase the system availability).Our proposed approach seeks to fundamentally revisit the architectural partitioning strategies during hardware design phases with the goal to integrate the self-healing capability into the hardware. Our anticipated outcomes will include the primitives needed by SHARC to facilitate robust runtime hardware adaptation to dynamically recover from the security attacks.We will investigate research thrusts to advance the state-of-the-art self-healing system designs:- Hardware support to perform efficient fault detection, that is critical to trigger recovery and rapidly contain any potential damages caused by an attacker already in the system.- Hardware-software codesign mechanisms to capture the application-specific faults caused by the program bugs, in contrast to the oblivious faults that occur due to system crashes and denial of service type issues.- Novel hardware-assisted self-healing that dynamically reconfigures the chiplet clusters to sidestep the faulty application code regions and gracefully recover the critical system services. With hardware support, we can repair the system dynamically without adversely affecting the performance of other concurrently running processes within the system.Benefits to the DoD: US Navy has critical assets deployed globally that demand continual operational status and the abilityto robustly recover from the security attacks launched by the adversaries. Self-healing systems can provide a rich starting point to support sustained operation of key naval assets, and chiplet-based architectures offer a natural platform to leverage the diversity of resources made available to recover from these attacks. Therefore, our proposed approaches can be very valuable to the US Navy#s mission.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Dec 15, 2023
- Source ID
- N000142412046
Entities
People
- Guru Prasadh Venkataramani
Organizations
- George Washington University
- Office of Naval Research
- United States Navy