Oxide superparaelectric p-bits for stochastic binary networks
Abstract
Using a network of stochastic probability bits (p-bits) offers a promising approach toovercoming key challenges encountered by quantum computing in solving large optimization problems. One flavor of p-bit utilizes the thermally fluctuating magnetization in the free layer of a magnetic tunnel junction. However, this approach faces several challenges. It requires continuously biasing the probability distribution of the fluctuating magnetization state using spin transfer torque, which leads to reduced energy efficiency due to resistive losses. Additionally, there is a long latency because of the fundamental precession frequency of magnetization (~1 GHz/1ns), which slows down the sampling of the network landscape. Moreover, this method increases the footprint of the system due to theneed for a source transistor. A materials solution to the p-bit is needed to overcome these challenges and enable large-scale computing of optimization tasks.The main objective of this proposal is to demonstrate a stochastic probability bit thatharnesses a fluctuating macroscopic dielectric polarization in oxide ferroelectrics taken totheir superparaelectric state. The technological motivation being a pathway to optimizationcomputing hardware with enhanced energy efficiency, reduced latency, and lower device footprint. The coupling of electric field to the dielectric polarization of an insulator provides continuous tunability of the fluctuating probability distribution while mitigating resistive losses. The fundamental fluctuation frequency is set by the attempt frequency for diffusion (~1 THz/ 1 ps) providing a pathway to higher sampling and lower latency. Lastly, oxides are integrable within the gate stack of Si providing a pathway to direct CMOS integration and a p-bit that is a single transistor (something like a p-FeFET) for smaller footprint.To achieve an electric field tunable thermally fluctuating electric dipole with fluctuationsoccurring on the sub-nanosecondtime scale, this project will:1. initially consider two distinct dielectric classes: paraelectrics (such as compositionalderivatives of (Ca/Ba,Sr)TiO3) and relaxor phases (e.g. Sm-BFBT and PMN-PT).2. explore epitaxial strain, composition, electrodes (workfunctionand depolarization), andphysical volume to control the anisotropy barrier and the size and density of polarnanoregions relative to ferroelectric correlation lengths.3. employ real-time displacement current measurements in nano-scaled, rf compatibleMIM capacitor structures with few picosecond resolution.4. build fundamental relationships to fabrication processes (deposition parameters,electrodes, and milling) using free energy and Landau-Ginzburg models.Lastly, this project will work to build a pathway to transistor gate stack integrationconsidering growth differences, influence of a buffer or interfacial layer, and inherent electrode asymmetry in a CMOS stack. If successful, a p-bit in the form of a Si transistor with stochastic superparaelectric gate dielectric will be testedAnticipated outcomes reside in fundamental knowledge on the engineering of thesuperparaelectric state, fundamental polarization dynamics, and a new p-bit with enhanced speed and energy efficiency with strategies to CMOS integration. On the human resources side, a postdoc and student will receive training to enter the technical workforce. The work proposed herein, if successful, will provide the fundamental element for energy efficient, fast, and scalable optimization computations for portable and autonomous technologies relevant to the DoD. As progress is made, we will act as a resource for films and devices for the preexisting MURI in the topical area.Approved for public release
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Nov 09, 2024
- Source ID
- N000142412744
Entities
People
- John T. Heron
Organizations
- Board of Regents of the University of Michigan
- Office of Naval Research
- United States Navy