Investigations into Integrated Circuit Camouflaging (5.3.5)
Abstract
Integrated Circuits (ICs) need to be reliable, safe, and secure throughout their lifetime. However with global supply chain and outsourced foundry, there is a real risk of IP theft through reverse engineering of IC design. The project aims to investigate reverse engineer s capabilities and limitations, and develop security metrics that reflect these capabilities and limitations. A variety of ad hoc IC camouflaging techniques will be assessed by devising effective reverse engineering attacks. The project aims to deliver a suite of reverse-engineering-resilient IC camouflaging techniques that are practical to deploy in security- and mission-critical ICs. The project will have several approaches in order to create the new technique of camouflage: 1) The team will devise reverse engineering methods to extract gate level netlists from the images of the camouflaged IC layout for analysis and for building the model and understandings that can enable camouflaging for protection. 2) Develop security metrics to evaluate the resiliency of IC camouflaging to reverse engineering. The team will then establish an algorithm to select gates to camouflage that optimizes the security metric. They will develop security metrics using formal methods (e.g ., solving SAT formulations) to verify the strength and effectiveness of the proposed camouflaging method. 3) The team will design provably reverse-engineering-resilient IC layout camouflaging techniques that can be used in IC design and fabrication so that it will be hard for adversaries to extract the IP design once the chip has been produced.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Jan 12, 2017
- Source ID
- W911NF1510278
Entities
People
- Ozgur Sinanoglu
Organizations
- Army Contracting Command
- New York University
- United States Army