Theoretical Foundations, Modeling, and Exploration for Analyzing Power Obfuscation in Secure Embedded Systems
Abstract
In this project, the PIs aim at developing new mathematical models for precise modeling and analyzing the vulnerability and the susceptibility of embedded systems software and hardware to side channel attacks and propose effective methodologies that can increase system resilience. PI will perform research under 4 thrust areas: Thrust 1: Power Obfuscation Modeling (POM): PI proposes to use a collocation method to model power obfuscation based on power consumption of the base software implementation and hardware platforms. Thrust 2: Hardware Platform Power Modeling (HPPM): PI will apply and extend the POM modeling to natural obfuscation present in the underlying hardware, and to model the power consumption of the base software implementations. Thrust 3: Side-Channel Attack Susceptibility Analysis: PI will establish a systematic evaluation framework to evaluate the effectiveness of the power obfuscation. Thrust 4: Performance, Power, and Susceptibility Tradeoffs for Power Obfuscation Methods: PI will explore the trade-off between individual power obfuscation functions with their respective impact on the success of side channel attacks. By exploring combinations of the highest performing power obfuscation functions, and analyzing new obfuscation methods, the PI hopes to identify novel approaches that perform better than existing methods.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Jan 12, 2017
- Source ID
- W911NF1610130
Entities
People
- Roman Lysecky
Organizations
- Army Contracting Command
- United States Army
- University of Arizona