OPTION 1: Implementation of novel benchmarking and error management protocols in planar transmon processors
Abstract
The proposed research aims at optimizing three types of two-qubit quantum logical gates in a planar superconducting transmon processor: the cross-resonance gate, the geometric phase gate (M¿lmer-S¿rensen Gate), and the controlled phase gate (Zeno gate). The first is implemented via microwave irradiation of one qubit at the excitation frequency of its capacitively coupled neighbor. With improvements in coherence times at the level of 100 ÀÀs and beyond, and quantum control methods to suppress spurious couplings. These improvements will take us from our current value of 93.7% two-qubit gate fidelity to an ultimate operation fidelity of 99.9%. The two other proposed gates are novel circuits which, on the basis of preliminary numerical simulations, are predicted to exhibit raw fidelities in excess of 90%. A research focus is to demonstrate the first realization of these gates, followed by subsequent optimization to achieve fidelities at the 99% level. The geometric phase gate developed is a novel superconducting qubit implementation of the M¿lmer-S¿renson gateÑa work horse in the atomic physics communityÑbased on the generation of cavity mediated coupling between two transmon qubits using additional microwave sideband drive tones, analogous to the laser light induced mechanically mediated coupling of the electronic degrees of freedom of ions in a Paul trap. Finally, using extensions of the quantum Zeno effect, we propose a new controlled phase gate in which the higher levels of the transmon are excited and strongly measured to inhibit certain inter-level transitions, effectively inducing a "pi" phase shift on a target two-qubit state. Improvements to superconducting quantum processor hardware include the design and integration of multiple stages of frequency specific Purcell filtering to permit the strong coupling of control lines to qubits, thereby minimizing crosstalk, without a significant increase in environment induced decoherence. Additionally, quasiparticle reduction techniques based on engineering the on-chip phonon density of states will be incorporated into multi-qubit chips. These designs modifications will be co-introduced with materials improvements targeting the removal and passivation of lossy surface dielectric layers introduced at each step of the qubit fabrication process. To further enhance performance, quantum control methods to (i) optimize drive pulses utilizing gradient based routines and machine learning algorithms, (ii) suppress crosstalk and spurious operating frequency shifts using dynamical decoupling sequences, and (iii) randomly compile gate sequences to suppress coherent errors will be developed and implemented. Finally, to diagnose the performance of the quantum processes described, extensions of randomized benchmarking techniques which yield information about specific noise models and consider coherent and non-Markovian effects are proposed for evaluation. In addition to these projective measurement based routines, simultaneous, continuous measurements of two coupled qubits will be performed to diagnose the onset of gate infidelity, particularly targeting correlated errors.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Feb 14, 2019
- Source ID
- W911NF1810178
Entities
People
- Irfan Siddiqi
Organizations
- Army Contracting Command
- National Security Agency
- University of California, Berkeley