SLIM - Stochastic Latency Insertion Method for the Rapid Simulation of Large Networks

Abstract

The objective of this project is to accelerate the commercialization of a simulation platform that will predict the performance of high-speed links and integrated circuits with unprecedented accuracy and computational efficiency. This capability is based on 6.1 research in simulation engine technologies that employ the latency insertion method (LIM). The latency insertion method has several advantages over the standard modified nodal analysis (MNA) method for simulating circuit: 1) it is faster because of its linear complexity; and 2) it propagates uncertainty more efficiently than its MNA counterpart. Over the past two decades, research on the LIM has led to significant progress making it currently a robust engine capable of driving a dependable circuit simulation platform. We believe that the proposed product has strong commercialization potential because of the growing need in the electronics industry to increase bandwidth and miniaturization. With increasing signal speeds and circuit density, the challenges of accurately predicting circuit performance have grown significantly. Today, many stages of the design flow (synthesis, timing, verification, placement, routing) must be power- and signal integrity-aware, and the availability of adequate tools to address these issues is seriously lagging. Nowadays integrated circuits house hundreds of millions of transistors. In addition, high speed links are currently achieving bit error rates in the order of 10-15. These require long simulation times that are beyond the existing capabilities. Presently, simulation times to verify these systems take days (and sometimes weeks) to complete, which is too slow to satisfy time to market objectives. In addition, the presence of uncertainty in several design parameters makes simulation a more daunting task requiring statistics and stochastic methods for proper analysis. This project seeks to build a commercialization plan for a modeling and simulation framework around the recently developed stochastic latency insertion method (SLIM). The tool will target designers of high-performance systems that are subject to uncertainties in the parameters of interest. In addition to integrating the engine, the project will provide all the required accessories. These will include graphical user interface (GUI), netlist parser, plotting and rendition routines. The package will help facilitate the design of high-bandwidth networks by reducing uncertainty, increasing accuracy, and guaranteeing faster turnaround time. Our commercialization activities will focus on a product that integrates simulation components into a design development environment. One of the critical components of the proposed tool will be its ability to perform stochastic simulations for sensitivity analysis in a manner that is far more efficient than the traditional methods. The proposed product will offer designers the convenience that they need in not only ease of analysis but also faster turnaround times. It is estimated that the time needed to complete the simulation platform to a viable product will be about three years. During these three years, the development will take place as well as reliability testing of the software to ensure its robustness. We have identified several potential customers and partners that will be helping us in the process of making the tool available and dependable platform.

Document Details

Document Type
DoD Grant Award
Publication Date
Feb 14, 2019
Source ID
W911NF1810441

Entities

People

  • Jose Schutt-aine

Organizations

  • Army Contracting Command
  • Office of the Secretary of Defense
  • University of Illinois Urbana–Champaign

Tags

Fields of Study

  • Engineering

Readers

  • Computational Modeling and Simulation
  • Economics
  • Integrated Circuit Design and Technology.

Technology Areas

  • Microelectronics