W911NF-19-S-0007 Low Power Compact Non-Volatile Memory and In-Memory Compute Architectures enabled by 2D Piezoelectric Transistors
Abstract
Motivated by the pressing need to overcome the limitations of existing memory technologies as well as the need to mitigate the memory bottleneck for meeting future data processing demands, this project proposes an extensive cross-layer exploration of a novel non-volatile memory with in-memory computing capabilities. The proposed memory technology, named as Piezoelectric Field Effect Transistor (PeFET), is based on the coupling of a piezoelectric material (which is also a ferroelectric) with the 2D transition metal di-chalcogenide (TMD) FET. PeFET utilizes the polarization retention in the piezoelectric layer to store information and employs a unique mechanism based on strain induced dynamic bandgap change in 2D semiconductors to sense the stored data. To harness the full benefits of this novel sensing scheme, this research proposes a coupled measurement and simulation based device-circuit-architecture co-design with the objectives of achieving (a) low power and robust non-volatile memory operations (b) in-memory Boolean computing and (c) in-memory ternary computing. At the device level, different flavors of PeFET structures and design methodologies will be explored, guided by the circuit requirements. The strain coupling between the piezoelectric and 2D TMD will be optimized by fabricating the piezoelectric transducers, coupling them with 2D TMD FET and characterizing the PeFETs through extensive measurements. At the circuit level, the unique attributes of the proposed PeFETs will be utilized to explore novel bit-cells and arrays, including a compact access-transistor-less memory and a differential memory. The emphasis will be to leverage the unique sensing mechanism to optimize the read operation, while simultaneously achieving low power polarization switching during write. Novel techniques to enable in-memory computation of a wide range of Boolean functions will be investigated based on multi-wordline assertion. In addition, new designs will be explored to achieve in-memory dot product computation of stored data (weights) with the inputs in the ternary regime, targeted towards quantized deep neural network (DNN) accelerators. The proposed sensing scheme based on strain-induced band-gap change will be ingeniously utilized for elegant implementations of ternary multiplication of the weight with the inputs within the memory array at no or mild area cost. Such a compact ternary bit-cell may not be possible with other existing memories as it leverages the unique property of strain based sensing proposed in this research. Small scale prototypes of the proposed arrays will be fabricated to experimentally demonstrate the functionality. At the architecture level, new designs exploiting the proposed compute enabled non-volatile memories will be developed in the context of general-purpose processors and DNN accelerators. The implications of blurring of the fundamental boundary between memory and compute will be explored through instruction set enhancements, cache architecture and programming frameworks to leverage in-memory computing. To facilitate the proposed cross-layer exploration, a devices-to-architecture simulation framework will be developed. Device models for PeFETs will be built based on phase field dynamics of piezoelectric self-consistently coupled with the dynamic band-gap change and transport in 2D TMDs. For circuit simulations, circuit-compatible modeling of PeFETs will be explored. The models will be calibrated with the experiments conducted in this project. For architectural evaluation, existing tools will be extended to enable the simulations of in-memory computation. The research outcomes are expected to lead to highly energy efficient data storage/processing, addressing the computing needs for a superior memory as well as critical defense needs for equipment with longer battery life, light weight and capabilities to learn and process massive amounts of data in real time.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Sep 04, 2019
- Source ID
- W911NF1910488
Entities
People
- Sumeet Kumar Gupta
Organizations
- Army Contracting Command
- National Security Agency
- University of Virginia