Efficient and Explainable Machine Learning with In-Memory CAM-based Computing
Abstract
This project develops high performance in-memory computing systems based on content addressable memories (CAM). The proposed activities build off of prior work that exposed the potential to accelerate more explainable machine learning applications that includes a broad class of tree-based models (e.g., Decision Trees, Gradient-boosted Trees, Random Forests) and probabilistic techniques (e.g., Monte Carlo Sampling methods). The objective of the present work is to engineer the higher layers of the compute stack built atop these novel CAM designs with a target set of applications around explainable machine learning and probabilistic computing. The methods to achieve this include 1) developing an efficient and flexible architecture built around lower power non-volatile memory elements, 2) developing an instruction set architecture (ISA), 3) preliminary compiler and software tool-chain, 4) building a simulation and performance benchmarking environment, and 5) engineering the emulation tools. The research activities proposed here will facilitate increased access to this novel accelerator design by users, as well as improved quantitative benchmarking in latency, energy, throughput, and the accuracy of computations for target workloads.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Oct 07, 2021
- Source ID
- W911NF2110355
Entities
People
- Catherine Graves
Organizations
- Army Contracting Command
- Hewlett Packard Enterprise
- National Security Agency