A Modular Superconducting Quantum Computing Architecture
Abstract
We propose to design, develop and experimentally test a class of modular superconducting quantum computers, with the primary goal of linking physically distinct superconducting qubit processor modules at high entanglement and state transfer rates, with very high fidelity. The effort includes experimental implementations combined with theoretical developments`. The modular design will focus on mitigating and minimizing the main challenges currently facing the development of superconducting quantum computers. One main goal is exploring improvements in the fidelity of two-qubit gates, which are currently limited to fidelities of order 99.0%-99.8%. This prevents the successful implementation of error correction protocols based on e.g. the surface code, which requires a roughly five- to tenfold improvement in the infidelity. In addition to parallel efforts to improve tuned CZ and iSWAP gates by engineering improvements in qubit decoherence, circuit design, and control, this effort will explore driven-dissipative methods to achieve lower infidelities for both local and remote two-qubit gates. In addition, our modular design will reduce the impact of qubit variability, variability that currently limits processor performance to that of the lowest fidelity qubits, by pre-selecting qubit dies for those meeting the highest performance standards. We will develop methods to significantly enhance survivability of cosmic ray and high energy radioactive particle events, where both experimental observations and theoretical analysis indicate that such events cause catastrophic qubit drop-out over large areas of the monolithic designs pursued to date. A modular design can significantly reduce the impact of these events and can also support error-correction methods that mitigate impact on the overall processor quantum state. We will also develop methods to measure and to reduce correlated errors between distant qubits, which have recently been discovered as one source of particularly pernicious errors, likely not mitigated by local error protection schemes such as the surface code. This project will significantly advance the ability to scale up superconducting quantum processors without requiring significant improvements in qubit performance or yield, as well as provide methods to reduce or eliminate some of the most egregious source of noise and decoherence that limit processor performance.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Feb 15, 2023
- Source ID
- W911NF2310077
Entities
People
- Andrew Cleland
Organizations
- Army Contracting Command
- National Security Agency
- University of Chicago