Automatic Implementation of Secure Silicon (AISS)
Abstract
The Automatic Implementation of Secure Silicon (AISS) program is enabling a design tool and Intellectual Property (IP) ecosystem where security is pervasive and can be naturally incorporated into chip design with minimal effort and expense. The program will enable rapid evaluation of architectural alternatives in platform integration where security is considered with conventional design economics, together being power, area, speed, and security. The program will advance multi-level provenance and integrity validation techniques for design through advances in current methods or invention of novel technical approaches, and will demonstrate new capabilities in the context of reduced instruction set computing (RISC) architectures or computer processors. AISS aims to automate inclusion of scalable defense mechanisms into chip designs to enable optimization of the security versus economics trade space. It will protect advanced chips from known attack strategies by incorporating security into a highly automated system aimed at reducing design time while maximizing exploration of architectural alternatives. As a result, DoD applications will benefit from more secure chips becoming pervasive whether procured commercially or designed specifically for defense systems.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2022
- Source ID
- aacacbfeaffa41ec35f953e15a3e1242
Related Documents
- Root: ELECTRONICS TECHNOLOGY