Processor Reconfiguration for Wideband Sensing Systems (PROWESS)
Abstract
The Processor Reconfiguration for Wideband Sensing Systems (PROWESS) program, building on technology developed in the Digital RF Battlespace Emulator (DRBE) program (budgeted in this PE and Project), will develop high-throughput streaming-data processors that change their programming at nanosecond timescales to detect novel radiofrequency (RF) signals. Sensing complex and unanticipated signals across wide RF bandwidths is limited by the computing capacity available at the tactical edge. Today's tactical spectrum sensors rely on field-programmable gate arrays (FPGAs) for low-latency, high-throughput signal processing. Since FPGA reconfiguration time (milliseconds) is much slower than RF signal dynamics (nanoseconds), FPGAs cannot optimize their signal processing in real time as new signals are observed. Recent advances in application-specific processing arrays, real-time task scheduling, and high-bandwidth input/output enable the development of new run-time reconfigurable array (RTRA) processors capable of reprogramming themselves as new signals are received. PROWESS will investigate RTRA processors and receiver integration approaches to enhance the performance of tactical RF sensors in congested spectrum.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2024
- Source ID
- c755caa20b101815c01581701ddf1815
Related Documents
- Root: ELECTRONICS TECHNOLOGY