Automatic Implementation of Secure Silicon (AISS)
Abstract
The Automatic Implementation of Secure Silicon (AISS) program is enabling a design tool and Intellectual Property (IP) ecosystem where security is pervasive and can be incorporated naturally into chip design with minimal effort and expense. The program will enable rapid evaluation of architectural alternatives in platform integration where security can be optimized relative to the conventional design economic measure of power, area, and speed. The program will advance multi-level provenance and integrity validation techniques for design through improvement of current methods or invention of novel technical approaches, and will demonstrate new capabilities in the context of reduced instruction set computing (RISC) architectures or computer processors. AISS will protect advanced chips from known attack strategies by incorporating security into a highly automated system aimed at reducing design time while maximizing exploration of architectural alternatives. As a result, DoD applications will benefit from more secure chips becoming pervasive whether procured commercially or designed specifically for defense systems.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2024
- Source ID
- cdd89290ffbdc820bd7ef0d3cb4649ff
Related Documents
- Root: ELECTRONICS TECHNOLOGY