Advanced Above Water Sensors

Abstract

Multi-Mission Signal Processor (MMSP): The development of MMSP provides simultaneous Anti-Air Warfare (AAW)/Ballistic Missile Defense (BMD) multi-mission capability for DDG 51 class ships as part of the Aegis Modernization Program. This capability is utilized for DDG 113 and follow new construction and Aegis Ashore. Modifies SPY-1D transmitters to enable dual beam for reduced frame times and better reaction time, provides stability for all D(V) waveforms, and avoids operational degradation. The SPY-1 radar system detects, tracks, and supports engagements of a broader range of threats. MMSP improves performance in littoral, ducted clutter, electronic attack (EA), and chaff environments and provides greater commonality in computer programs and equipment. This effort also provides for the development of MMSP on Destroyers Commercial Off The Shelf (COTS) refresh and MMSP technology refresh. MMSP/AEGIS Linear Processing System (ALPS) integration provides adjunct processing for data collection. The FY24 budget request supports development of MMSP including the commencement of technology refresh to support Aegis Modernization due to Diminishing Manufacturing Sources and Material Shortages (DMSMS) and obsolescence issues. MMSP-Restoration (MMSP-R) includes software updates required on new computer platforms. Engineering efforts will be required to assess alternate technologies and determine optimal MMSP architectural solutions, which will include system security requirements. Additionally, funding is required for technology development to support integration of ALPS into MMSP-R, continuation of MMSP-R development to support AEGIS modernization and AEGIS Capability Build (ACB) 16 MMSP improvements, and MMSP-R Engineering Change Proposal (ECP)/Software updates. Shipboard Passive Electro-Optical Infrared (SPEIR) Block I will be an open architecture system that addresses near-term capability requirements and associated gaps identified in the 2019 SPEIR Capability Development Document (CDD). This program answers an urgent counter unmanned aircraft system operational need for the Fleet to provide an initial capability by FY26. The SPEIR acquisition leverages technology developed under the Office of Naval Research's (ONR's) Combined EO/IR Surveillance and Response System (CESARS) Science and Technology (S&T) effort, specifically related to the Shipboard Panoramic EO/IR Cueing and Surveillance System (SPECSS). SPEIR Block I will provide a common 360-degree EO/IR Electronic Support (ES) capability to surface ships that will passively find, fix, track, and target current / emerging threats in support of the following warfare missions: Anti-Ship Cruise Missile (ASCM) Defense, Counter-Unmanned Aircraft Systems (UAS), Counter-Fast Attack Craft / Fast In-shore Attack Craft (FAC/FIAC), and Mobility. SPEIR Block I will consist of a passive Wide Field of View (WFOV) capability with a 360-degree field-of-view optical sensors for autonomous detection and tracking for 24/7 day/night shipboard situational awareness. SPEIR Block I will also include an enhanced, high resolution Narrow-Medium Field of View (NFOV) and laser range-finding capability that will provide 3D target tracking, identification, and threat assessment. SPEIR Block I will have limited integration with shipboard combat systems to exchange target track data and disseminate motion imagery. This program includes risk reduction initiatives for modeling and simulation, sensor protection counter-countermeasures, Sensor Fusion Algorithms and combat system track publishing to enable limited Combat System Integration (CSI). SPEIR Block II will be a future program that will build on the modular open system architecture of Block I to address longer-term capability requirements to include an expanded spatial coverage envelope, Periscope Detection and Discrimination (PDD) and Mine Like Object (MLO) avoidance. SPEIR Block II will also provide full combat system integration and will include a government software development and integration effort for Soft-Kill Coordination System (SKCS) to manage ES engagements. The FY24 budget request supports detailed hardware and software design of the SPEIR Block I system, completion of core software builds and associated integration effort, and procurement of material for Engineering Development Models (EDMs). Scope includes execution of Critical Design Review (CDR), continued test planning, training curriculum development, and Modeling and Simulation (M&S) development and maturation. Increases from FY22-FY25 are consistent with expected ramp up of developmental activities of a new Acquisition Category II program during the Engineering and Manufacturing Development (E&MD) phase. The FY24 budget request also includes funding to support E&MD contract execution, including a major System Engineering Technical Review (SETR) event (CDR) and will also support integration activities to ensure compatibility with the Combat System. Additional funds have been received in FY24-FY27 to align with the program MS B Service Cost Position (SCP), including additional funding for SPEIR Combat System Integration tasking not previously included in this funding line. RDT&E costs are anticipated to ramp down starting in FY25 as Integration & Development Test planning is complete, EDM material procurements are completed, and all three (3) EDMs are assembled and integrated to support the execution of developmental test events prior to program transition to the Production phase. Improved Capabilities for SPY-1 Radar: These Reliability, Maintainability, and Availability (RM&A) improvements and solid state technology insertions are intended to reduce cascading failures, mitigate obsolescence issues, and improve reliability in support of Anti-Air Warfare (AAW) and Ballistic Missile Defense (BMD) missions while still providing AN/ SPY-1 Radar Total Ownership Cost Reductions. Improvements, such as Solid State Insertion to address Diminishing Manufacturing Sources and Material Shortages (DMSMS), will yield reductions in annual fleet maintenance costs and is a top fleet requirement as part of the AEGIS Wholeness initiative. In addition to RM&A improvements, warfighting improvements funded in this line includes the following: Transmitter Noise Cancellation (TNC) development includes hardware/software to counter low radar cross section, low altitude threats. Side Lobe Blanking (SLB) addresses shortfalls in mixed electronic attack environment while in an Integrated Air and Missile Defense (IAMD) mode. The Ship-Based Non-Cooperative Target Recognition (SBNCTR) program Phases 2A and 3 will develop algorithms to provide classification for targets. Advanced Calibration Experiment (ACE) Phase 2 is being incorporated into Baseline 9. Elevated Radar Advanced Calibration Experiment (ERACE) Phases 1/2 and 3 incorporate into Baseline 9. Electronic Attack (EA) and Rapid Radar Capability Improvement Program (R2CIP) develop solutions for evolving EA threats. The FY24 budget request continues the development efforts of SBNCTR Phase 2A, TNC Phase 1/2, EA improvements, Digital Receiver Upgrade (DRU) (formerly digital Low Noise Amplifier (dLNA)) Requirements and Specification Analysis, and SLB Technology Development, completes Elevated Radar Advanced Calibration Experiment (ERACE) Phase 1/2, and commences ERACE Phase 3 development. AN/SPS-49 Technology Refresh: FY22 was the last year of funding for this program. AN/SPS-49 is the only Air Surveillance Radar on the LSD 41/49 class ships. Continued degradation and increasingly low radar availability of the AN/SPS-49 Radar is greatly impacting deployed missions, impacting safety of flight and affecting LSD Air Warfare capability and operations and as a result, AN/SPS-49 Technology Refresh is required. This AN/,SPS-49 Technology Refresh will include Reliability, Maintainability, and Availability (RM&A) improvements and solid state technology insertions which will reduce cascading failures and mitigate obsolescence issues. In addition, this effort replaces key components to include: transmitter, receiver, exciter, antenna elevation servo control, radar system control, display and signal data processor (SDP). A digital receiver/exciter (DREX) with high-performance computing technology will be a key component in the new system. The current SPS-49 radar has no software so new software is being developed to mimic the current radar functions to maintain compatibility with internal and external interfaces. This effort will improve SPS-49 electronic protection, have increased surveillance range and increased slow moving small target detection, as well as reduce total ownership cost with lower unit cost and smaller size/weight/power requirements. Funding is also to complete development, test and evaluation, validation and integration of a technology refresh of the below deck hardware for the AN/ SPS-49A(V)1 Long Range Air Surveillance Radar.

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Document Details

Document Type
R2 Budgetary Justification
Publication Date
Oct 01, 2024
Source ID
0604501N_5_1319_PB_2024
Change Summary Explanation
- FY23 funding decrease is due to under-execution realignments ($8.337M) and FFRDC reductions ($.145M) for the SPEIR and SPY-1 programs. - FY24 funding increase of $13.778M is due to receipt of additional funding for the SPEIR program for Block 1 Milestone B Compliance with the Service Cost Position (SCP).
Service Agency Name
Navy

Entities

Organizations

  • United States Navy

Tags

Communities of Interest

  • Electronic Warfare
  • Engineered Resilient Systems (Alumni COI)
  • Ground and Sea Platforms
  • Kinetic Weapons
  • Sensors

DTIC Thesaurus Topics

  • Computer Programs
  • Cost Analysis
  • Counter Countermeasures
  • Detectors
  • Failure Mode And Effect Analysis
  • Low Noise Amplifiers
  • Maintenance
  • Optical Detectors
  • Procurement
  • Product Development
  • Radar
  • Software Development
  • Systems Engineering
  • Target Recognition
  • Test And Evaluation
  • Unmanned Aerial Systems
  • Unmanned Aerial Vehicles

Fields of Study

  • Engineering

Readers

  • Naval Mine Countermeasure Systems Development.

Technology Areas

  • Autonomy
  • Directed Energy
  • Microelectronics

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