Improved Capabilities SPY-1 Radar

Abstract

Improved Capabilities for SPY-1 Radar: These Reliability, Maintainability, and Availability (RM&A) improvements and solid state technology insertions are intended to reduce cascading failures, mitigate obsolescence issues, and improve reliability in support of Anti-Air Warfare (AAW) and Ballistic Missile Defense (BMD) missions while still providing AN/ SPY-1 Radar Total Ownership Cost Reductions. Improvements, such as Solid State Insertion to address Diminishing Manufacturing Sources and Material Shortages (DMSMS), will yield reductions in annual fleet maintenance costs and is a top fleet requirement as part of the AEGIS Wholeness initiative. In addition to RM&A improvements, warfighting improvements funded in this line includes the following: Transmitter Noise Cancellation (TNC) development includes hardware/software to counter low radar cross section, low altitude threats. Side Lobe Blanking (SLB) addresses shortfalls in mixed electronic attack environment while in an Integrated Air and Missile Defense (IAMD) mode. The Ship-Based Non-Cooperative Target Recognition (SBNCTR) program Phases 2A and 3 will develop algorithms to provide classification for targets. Advanced Calibration Experiment (ACE) Phase 2 is being incorporated into Baseline 9. Elevated Radar Advanced Calibration Experiment (ERACE) Phases 1/2 and 3 incorporate into Baseline 9. Electronic Attack (EA) and Rapid Radar Capability Improvement Program (R2CIP) develop solutions for evolving EA threats. The FY24 budget request continues the development efforts of SBNCTR Phase 2A, TNC Phase 1/2, EA improvements, Digital Receiver Upgrade (DRU) (formerly digital Low Noise Amplifier (dLNA)) Requirements and Specification Analysis, and SLB Technology Development, completes Elevated Radar Advanced Calibration Experiment (ERACE) Phase 1/2, and commences ERACE Phase 3 development.

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Document Details

Document Type
Project
Publication Date
Oct 01, 2024
Source ID
3301_0604501N_5_1319_PB_2024

Tags

Readers

  • Naval Mine Countermeasure Systems Development.

Technology Areas

  • Microelectronics

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