Verification & Validation (V&V) Capabilities and Standards for Trust
Abstract
This project improves microelectronics test and verification methodologies in support of quantifying and verifying the trust and assurance of parts and develops standards and practices to foster commercial development of secure, trusted and assured parts. Verification and test technologies are required to provide direct program support for microelectronics assurance verification. Out-year demands will require an increase in capacity, which will take the form of additional personnel and/or equipment to permit scaling of microelectronics assessment capabilities. Challenges have been identified, to include the ability to analyze leading-edge technology nodes (<32 nanometers (nm)), throughput/time required for analysis, ability to analyze third-party intellectual property (IP) contained in microelectronic components, and analysis of non-application specific integrated circuit (ASIC) components that are increasingly being used for agility, e.g., Field-Programmable Gate Arrays (FPGAs). This project addresses these gaps in current technical capabilities as required to meet the realized and projected out-year demand for core Trusted & Assured Microelectronics laboratory services. Three capability areas core to microelectronics analysis and verification will be improved: • Physical verification, i.e., destructive analysis of integrated circuits and printed circuit boards. • Functional analysis, i.e., non-destructive screening/verification of select, critical parts. • Design verification, i.e., verification/assurance of designs, IP, netlists, bitstreams, firmware, etc. These improvements address two primary attributes: (1) technical capability including laboratory equipment, IP, analysis tools, such as imaging software, and highly skilled tradecraft, and (2) the capacity to perform microelectronics assessments and quantify assurance. This project develops and matures assurance mitigations, quantitatively evaluates the effectiveness of protections of IP in support of confidentiality and integrity, and develops and validates obfuscation and disaggregation technologies. The project will address physical validation tool and capability development, design software validation tool development, counterfeit detection and imaging techniques, system vulnerability assessments, testbeds, and distributed data source availability to demonstrate and operationalize full lifecycle data driven quantifiable assurance. This project also develops standards and practices in support of assured designs, supply chains and formal relationships with industry.
Document Details
- Document Type
- Project
- Publication Date
- Oct 01, 2021
- Source ID
- 645_0604294D8Z_4_0400_PB_2021
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- Root: Trusted and Assured Microelectronics
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