Create a Quantifiably Assured-Microelectronics Pipeline

Abstract

This project will promote microelectronics innovation and create a quantifiably-assured Microelectronics pipeline including continuing Joint Federated Assurance Center (JFAC) strategic partnerships, assuring field programmable gate array (FPGA) devices, supplier chain awareness and security, and workforce development. It will slow and in the long-term reverse offshoring trends by fostering commercial and Government alliances to preserve the U.S. ecosystem, lower barriers to innovation and adoption, strengthen workforce expertise, ensure DoD has access to the next generation of advanced technology with quantifiable assurance throughout the product pipeline, and maintain the United States as the global source for high- end, secure, and reliable microelectronics components. In addition, this project will develop a new data driven quantifiable assurance paradigm for supply chain protection. It will strengthen security while improving access, exposing no sensitive intellectual property (IP) to the foundry and requiring post-manufacture validation of foundry products. The enhancement will develop quantifiably assured design concepts in manufactured systems, enabling a formal risk-based approach to protection techniques. Manufactured microelectronics will be tested to ensure that IP protections meet or exceed current National Security Agency standards for IP protection, and to develop DoD’s ability to detect certain malicious supply chain attacks on DoD microelectronics.

Document Details

• Document Type: Project
• Publication Date: Oct 01, 2023
• Source ID: 912_0604294D8Z_4_0400_PB_2023

Tags

Readers

• Cybersecurity.
• Defense Technology Research and Development.
• Integrated Circuit Design and Technology.

Technology Areas

• Microelectronics