ON THE MINIMUM STAGE REALIZATION OF SWITCHING FUNCTIONS USING LOGIC GATES WITH LIMITED FAN-IN

Abstract

In this paper a method was presented for reducing the number of stages of logic in the realization of an arbitrary Boolean function when an upper bound exists on the fan-in at each gate. A procedure for obtaining the minimum stage realization of the function in sum of products form was first developed. The use of factoring to reduce the number of stages below this minimum was then described.

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Document Details

Document Type
Technical Report
Publication Date
Aug 01, 1964
Accession Number
AD0607229

Entities

People

  • A. J. Bernstein
  • G. L. Hicks

Organizations

  • Princeton University

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Circuit Analysis
  • Circuits
  • Electrical Engineering
  • Engineering
  • Hard Copy
  • Logic
  • Logic Gates
  • Networks
  • New Jersey
  • Switching
  • Switching Circuits
  • Universities

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