Fabrication Security and Trust of Domain-Specific ASIC Processors
Abstract
This paper describes our experience developing techniques to protect embedded intellectual property (IP) while an ASIC is being fabricated in an untrusted foundry. We created a customizable, high performance, domain-specific ASIC processor architecture, which we showed to be effective in protecting IP and mitigating the expense and inflexibility associated with using ASIC technology. Using an ASIC Fast Fourier Transform (FFT) accelerator as a test case, we have investigated various obfuscation options and their practicality in ensuring the trust and security of the processor when it is fabricated. The result is a processor architecture that incorporates split fabrication, configurable switch arrays and fabrics, programmable controllers, and configurable functional kernels. We have introduced a quantitative metric to gauge the effectiveness of application obfuscation for a domain-specific processor during fabrication.
Document Details
- Document Type
- Technical Report
- Publication Date
- Oct 30, 2016
- Accession Number
- AD1032251
Entities
People
- Karen M. Gettings
- Michael Vai
- Theodore M. Lyszczarz
Organizations
- MIT Lincoln Laboratory