A Novel Threshold Voltage Defined Multiplexer for Interconnect Camouflaging
Abstract
Semiconductor supply chain is increasingly getting exposed to variety of security attacks such as Trojan insertion, cloning, counterfeiting, reverse engineering (RE), piracy of Intellectual Property (IP) and side-channel analysis due to involvement of untrusted parties. Camouflaging of gates has been proposed to hide the functionality of fates. However, camouflaging is associated with significant area, power and delay overhead. In this paper, we propose camouflaging of interconnects using multiplexers (muxs) to protect the IP. A transistor threshold voltage-defined pass transistor multiplexer is proposed to prevent its reverse engineering since transistor threshold voltage is opaque to the adversary. The proposed pass transistor based multiplexer having more than one input, hides the original connectivity of the net.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 2017
- Accession Number
- AD1041839
Entities
People
- Jae-Won Jang
- Swaroop Ghosh
Organizations
- Pennsylvania State University