A 205GHz Amplifier in 90nm CMOS Technology
Abstract
This paper presents a 205GHz amplifier drawing 43.4mA from a 0.9V power supply with 10.5dB power gain, P(sat) of -1.6dBm, and P(1dB) approximately -5.8dBm in a standard 90nm CMOS process. Moreover, the design employs internal (layout-based) /external (using passive embedding around the transistor) neutralization techniques for improving performance and yield of the overall system while canceling the effect of internal parasitic capacitors. The fabricated amplifier has the highest operation frequency among all reported amplifiers in 90nm and greater CMOS technologies.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 2017
- Accession Number
- AD1042244
Entities
People
- Shahab Ardalan
Organizations
- San José State University