Annealing Protocol and Finite Element Model for Recovery of Radiation-Damaged Electronics
Abstract
Technological advancements in electronic device scaling has led to the use of smaller spacecraft that can travel at higher speeds and lower costs associated with launch weight and propulsion. Traditional counter-radiation methods for space electronics involve hardened chip designs that negate the benefits of using smaller, lighter spacecraft. A self-healing counter-radiation approach, using a micro-heater to thermally anneal commercial-off-the-shelf (COTS) chips, is an attractive alternative due to performance enhancement and reduced cost and weight. In this research, the degradation of COTS transistors via gamma radiation and their subsequent recovery in the laboratory is experimentally proven. Through an iterative process, an annealing protocol is developed that successfully recovered damaged bipolar junction transistors (BJT) exposed to 510 Mrad radiation doses in approximately two hours at 200 deg C. Additionally, finite element modeling is used to create an annealing micro-heater, adjust heater parameters to optimize performance, and explore heater integration with a ceramic chip package, lid, and transistor. The annealing protocol and model results in this research provide the foundation for future self-healing efforts using more complex electronics, such as logic units. Furthermore, this research can serve to enhance the robustness of space electronics for future space missions executed by the DOD and subordinate organizations, such as the U.S. Space Force.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 2023
- Accession Number
- AD1213513
Entities
People
- Joseph L. Kalinka
Organizations
- Naval Postgraduate School