Vertical Transistor Investigation for I2L Structures.

Abstract

A one-dimensional mathematical model is presented for the vertical transistor associated with an I2L semiconductor device. This particular model represents a modification of similar models used for bipolar transistor operation; it requires little computer time and has been subjected to extensive verification over past years. Although incomplete in its present form, the model suggested here is based upon the physical mechanisms encountered during semiconductor device operation. For this reason, it is suggested that little additional effort would be required to complete this model, including the physical mechanisms associated with damage arising from an ionizing type of radiation environment. (Author)

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Document Details

Document Type
Technical Report
Publication Date
May 01, 1977
Accession Number
ADA042345

Entities

People

  • David P. Kennedy

Organizations

  • University of Florida

Tags

Communities of Interest

  • Advanced Electronics
  • Space
  • Weapons Technologies

DTIC Thesaurus Topics

  • Bipolar Junction Transistors
  • Current Density
  • Electrical Properties
  • Electronics
  • Electronics Industry
  • Electronics Laboratories
  • Electrons
  • Engineering
  • Metal Oxide Semiconductors
  • Modules (Electronics)
  • Navy
  • P-N Junctions
  • Power Electronics
  • Semiconductor Devices
  • Semiconductors
  • Solid State Electronics
  • Transistors

Readers

  • Finite Element Method (FEM) for solving Partial Differential Equations (PDEs)
  • Life Cycle Cost Analysis
  • Semiconductor Device Technology

Technology Areas

  • Microelectronics