An Analog CCD Reformatting Memory Employing Two-Dimensional Charge Transfer.
Abstract
An analog DDC reformatting memory has been designed and fabricated using an N-channel double level polysilicon gate process. This unique CCD structure employs two-dimensional charge transfer cells in a 32x32 element array which is accessed by means of integrated CCD demultiplexer and multiplexer structures resulting in greater dynamic range than observed in previous line-addressed designs. The design and operation of this structure are discussed, and examples of application in signal processor architectures are described. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1979
- Accession Number
- ADA082449
Entities
People
- Robert J. Kansy
Organizations
- Texas Instruments