VLSI Implementation of Digital Fourier Transforms.

Abstract

The construction of Fast Fourier Transform (FFT) processors is discussed. Pipeline and parallel-pipeline organizations are developed and are shown to meet the constraints imposed by VLSI. Various circuit technologies for the construction of these processors are compared, and the description of a set of NMOS chips are given. A technique for reducing the latency of the adders internal to the chips is also presented. Finally, a broad set of possible FFT organizations is discussed. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Nov 01, 1982
Accession Number
ADA121898

Entities

People

  • A. Despain
  • C. Sequin
  • Callie M Thompson
  • D. Lioupis
  • E. Wold

Organizations

  • University of California, Berkeley

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Ground and Sea Platforms

DTIC Thesaurus Topics

  • Accuracy
  • Algorithms
  • Aspect Ratio
  • Beam Forming
  • Cascade Structures
  • Charge Coupled Devices
  • Charge Transfer
  • Circuits
  • Discrete Fourier Transforms
  • Fast Fourier Transforms
  • Frequency
  • Lepidoptera
  • Networks
  • Notation
  • Shift Registers
  • Signal Processing
  • Two Dimensional

Fields of Study

  • Engineering

Readers

  • Image Processing and Computer Vision.
  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design