Universal Pin Electronics.

Abstract

The report describes a unique and advanced test system architecture which has the ability to put virtually an entire test system into a test head and is capable of operating at repetition rates of 100MHz and with test vectors of 250,000 bits deep. In addition, this new architecture has the potential to also provide extended analog capability with greatly improved reliability in a small physical package and at a reduced cost over conventional automatic test equipments. Block diagrams of the overall system, major subsystem and the single channel are presented and described. Specifications of the overall system and the single channel are also presented. In addition to its use as an off-line ATE, this architecture can bring its inherent testing power directly to built-in-test (BIT) applications. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Nov 03, 1982
Accession Number
ADA126660

Entities

People

  • Philip C. Jackson

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Computer Programming
  • Computer Programs
  • Computers
  • Digital Data
  • Electronics
  • Failure Mode And Effect Analysis
  • Frequency
  • Measurement
  • Operating Systems
  • Power Supplies
  • Reliability
  • Repetition Rate
  • Semiconductors
  • Simulators
  • Standards
  • Test Equipment
  • Waveform Generators

Fields of Study

  • Physics

Readers

  • Integrated Circuit Design and Technology.
  • Software Engineering

Technology Areas

  • Microelectronics
  • Microelectronics - Microelectromechanical Systems