Basic EMC (Electromagnetic Compatibility) Technology Advancement for C3 Systems, Macromodeling of Digital Circuits. Volume 2B.

Abstract

A NAND gate macro-model is developed using SPICE which allows for the complete simulation of the operation of the logic gate. The model derivation requires only external DC voltage and current measurements and logic delay times, but the model developed is shown to fully simulate the high-frequency response of the device as well, including the response of the device to interference in the 1-100MHz range. A simpler SUPER*SCEPTRE NAND gate model is also presented, which effectively models the response up to normal switching speed limits. Also, a less complex SPICE modeling procedure is developed for the purpose of modeling large logic circuits in a minimum of computer time.

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Document Details

Document Type
Technical Report
Publication Date
Apr 01, 1984
Accession Number
ADA146333

Entities

People

  • J. C. Bowers
  • R. S. Vogelsong

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Air Force
  • Capacitance
  • Circuit Analysis
  • Circuits
  • Classification
  • Digital Circuits
  • Education
  • Frequency
  • Logic
  • Logic Elements
  • Logic Gates
  • Nand Gates
  • Power Supplies
  • Resistance
  • Security
  • Standards
  • Waveforms

Fields of Study

  • Physics

Readers

  • Aerospace Test and Evaluation
  • Computational Modeling and Simulation
  • Integrated Circuit Design and Technology.

Technology Areas

  • Fully Networked C3
  • Fully Networked C3 - Command and Control