Testability Measures on a State-of-the-Art Circuit.

Abstract

By means of design for testability (DFT) techniques, the NOSC Test Technology Office (Code 936) evaluated testability improvements in a state-of-the-art printed-circuit board. Data were gathered to provide a direct comparison among various testability figure of merit (TFOM) tools. Keywords include: Design for testability (DFT); Printed-circuit boards; MIL-STD 2165; STAMP; and LOGMOD.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1986
Accession Number
ADA165978

Entities

People

  • J. C. Bussert

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Central Processing Units
  • Circuit Analysis
  • Circuit Boards
  • Circuits
  • Classification
  • Computer Programs
  • Computer-Aided Design
  • Computers
  • Databases
  • Engineers
  • Failure Mode And Effect Analysis
  • Printed Circuit Boards
  • Printed Circuits
  • Simulators
  • Test Equipment
  • Very Large Scale Integration

Fields of Study

  • Education

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design