Fault-Tolerant Signal Processing Architectures with Distributed Error Control,
Abstract
New fault-tolerant architectures are investigated to protect modern VLSI implementations against soft errors, internal momentary errors, random in both time and space, characterized by their short and infrequent nature. Work has progressed on both recursive and nonrecursive digital filters. One approach in the recursive case uses many parallel sections, each employing distinct finite field arithmetic and protected by powerful cyclic codes distributed throughout the realization. These results are easily extended to the signal processing aspects of other important systems such as protecting and speeding the operations in cyclic error-correcting code decoders. In another direction, convolutions between data arrays can be protected with cyclic codes defined over the real rings and fields commonly used in arithmetic units. On the other hand, recursive realizations can be made fault-tolerant by embedding convolutional error-correcting codes, defined over either real or complex fields or finite integer rings, directly with the filter weighting. This is a natural integration since both the filtering operations and those generating the convolutional codes are essentially the same once the time-varying nature of the code structure is properly located. The impact of fault tolerance on system overhead is being analyzed, and the advantages of interacting with existing test subsystems, such as scan designs and built-in self-test, are being evaluated.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 21, 1986
- Accession Number
- ADA175636
Entities
People
- Robert Redinbo
Organizations
- University of California