Processor and Data Bus Interface Analyses

Abstract

This final report provides a summary of work accomplished under the Processor and Data Bus Interface Analyses S.O.W. Task, as well as other subtasks in support of the AFWAL Avionics Laboratory for the contract period 29 April 1985 to 31 December 1986. The report, which is in five parts, outlines the objectives, achievements and conclusions of each of the following contract basic tasks and subtasks: 1. Processor and Data Bus Interface Analyses - General Support Task, 26 April 1985, 2. VHSIC 1750A Computer Fault Logging Requirements Analysis subtask, 24 Feb 1986, 3. Logistics Assessment Work Station (LAWS) supportability Analysis of the VHSIC 1750A Computer subtask, 26 June 1986, 4. Operational Avionics Data for Pave Pillar Correlation subtask, 2 May 1986, and 5. Change One to the Contract S.O.W., Task No. 4, 19 June 1986. These tasks were performed for AFWAL/AAAS-3, AFWAL/CDLA and AFWAL/FIX under contract number N00140-82-G-BZ99/Y306 and contract modification number Y30601.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1987
Accession Number
ADA198801

Tags

Communities of Interest

  • Advanced Electronics
  • Weapons Technologies

DTIC Thesaurus Topics

  • Abstracts
  • Air Force
  • Availability
  • Avionics
  • Classification
  • Computer Programs
  • Contracts
  • Databases
  • Failure Mode And Effect Analysis
  • Life Cycle Costs
  • Life Cycles
  • Logistics
  • Logistics Support
  • Maintenance
  • Reliability
  • Security
  • Work Stations

Readers

  • Aerospace Engineering
  • Clinical Trial Research.
  • Instructional Design and Training Evaluation.