Performance Tradeoffs in Multithreaded Processors

Abstract

High network and memory latencies in large-scale multiprocessors can cause a significant drop in processor utilization. Overlapping computation from alternate processes with memory accesses in multithreaded processors can reduce processor idle time. A multithreaded processor maintains multiple process contexts in hardware and can switch between them in a few (say, zero to 16) cycles. This paper proposes an analytical performance model for multithreaded processors that includes cache interference, network contention, and context- switching overhead effects. The model is validated through our own simulations and by comparison with previously published simulation results. Our results indicate that processors can substantially benefit from multithreading, even on system with small caches. Large caches yield close to full processor utilization with as few as 2 to 4 processes, while small caches require two to four times more processes. Increased network contention due to multithreading has a negligible effect on performance, and the context switching overhead sets a limit on the best possible utilization.

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Document Details

Document Type
Technical Report
Publication Date
Oct 01, 1989
Accession Number
ADA217123

Entities

People

  • Anant Agarwal

Organizations

  • Massachusetts Institute of Technology

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Access Time
  • Application Software
  • Computer Architecture
  • Computer Programming
  • Computer Science
  • Computers
  • Computing System Architectures
  • Instruction Set Architecture
  • Models
  • Multiprocessors
  • Multiprogramming
  • Multithreading
  • Operating Systems
  • Programming Languages
  • Simulations
  • Steady State
  • Time Intervals

Fields of Study

  • Computer science

Readers

  • Parallel and Distributed Computing.