Research in VLSI Systems. Heuristic Programming Project and VLSI Theory Project. A Fast Turn Around Facility for Very Large Scale Integration (VLSI)
Abstract
A system compiling regular expressions into PLA;s or logic has been developed. The input language has been augmented recently to include state declaration when convenient; in the syntax, entering a state looks similar to the occurrence of an input symbol, while transfer to a state is akin to emitting an output symbol. The regular expression language is translated to a nondeterministic finite automaton (NFA) language by one of two different compiler strategies, called 'before' and after.' The former tends to minimize the number of rows of a PLA, while the latter tends to minimize the columns. Neither strategy dominates the other in tests, so both are made available as options for the user. Keywords: Very large scale integration, Regular expression compilation, MIPS: A VLSI Processor, Relative layout tools, Graphics architectures, Computer Supported FTL, Palladio: IC Designer's assistant, Electron bean lithography, Micron CMOS, Wafer fabrication facility.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1982
- Accession Number
- ADA222416
Entities
People
- J. Hennessy
- J. Newkirk
- J. Shott
- J. Ullman
- R. Matthews
Organizations
- Stanford University