Design and Development of a High-Speed Winograd Fast Fourier Transform Processor Board

Abstract

Since 1985, the Air Force Institute of Technology has pursued a project to develop a 4080-point Discrete Fourier Transform processor using the Winograd Fourier Transform Algorithm (WFTA) and Good-Thomas Prime Factoring Algorithm (PFA). In the first attempt to build a working system, this research effort designed and constructed, in part, a modified single processor architecture in order to demonstrate the proof of concept of the WFTA system design. This prototype architecture is simpler in implementation but uses the same principles and procedures as those of the 4080-point WFTA design. The design developed in this thesis was validated using the Very High-Speed Integrated Circuit Hardware Description Language (VHDL) to simulate its operation. A partial construction of the design was built and tested verifying the VHDL results.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1992
Accession Number
ADA258919

Entities

People

  • James F. Herron

Organizations

  • Air Force Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Air Force
  • Algorithms
  • Application-Specific Integrated Circuits
  • C Programming Language
  • Computer Programming
  • Computer Programs
  • Computers
  • Construction
  • Digital Signal Processing
  • Discrete Fourier Transforms
  • Electronics
  • Fast Fourier Transforms
  • Integrated Circuits
  • Language
  • Machine Languages
  • Programming Languages
  • Prototypes

Fields of Study

  • Engineering

Readers

  • Emergency Management and Homeland Security.
  • Integrated Circuit Design and Technology.
  • Parallel and Distributed Computing.