Test Methods and Custom Hardware for Functional Testing of a High Speed GaAs DRAM
Abstract
The goal of this project is to produce a digital circuit operating near a frequency of 250 MHz to test a new experimental Gallium Arsenide (GaAs) Dynamic Random Access Memory (DRAM). This thesis presents the design of the digital circuit using 'off-the-shelf Emitter Coupled Logic (ECL) and the design of a six layer printed circuit test fixture. The use of ECL is illustrated including general design rules, high speed design considerations, and basic transmission line theory. Finally, the design is laid out, and simulated using commercially available Computer Aided Design (CAD) and Computer Aided Manufacturing (CAM) tools. Examples and shortcomings of schematic capture, logic simulation, PCB design, and auto-routing are discussed as applicable to fabrication of the final product.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1993
- Accession Number
- ADA274859
Entities
People
- Michael P. Butler
Organizations
- Naval Postgraduate School