Low Voltage Operational Amplifier using Parasitic Bipolar Transistors in CMOS.
Abstract
In this research, a low voltage BiCMOS operational amplifier was built using parasitic bipolar transistors in bulk CMOS technology. Designed and analyzed using PSPICE circuit simulation software, the amplifier achieves a gain bandwidth product of 20.24 MHz with power supply voltages of +/- 2.5 V. The simulation proved that the BiCMOS amplifier will operate with power supplies as low as +/- 0.6 V. Using MAGIC VLSI software, a layout of the amplifier was made for eventual fabrication in the MOSIS 2.0 m CMOS process.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1995
- Accession Number
- ADA303882
Entities
People
- Jaime P. Chunda
Organizations
- Naval Postgraduate School