Design Considerations for Low Phase Jitter Clock Generators
Abstract
This work explores the generation and propagation of phase jitter within the microprocessor clock generator. Introducing the fundamentals of phase-lock circuits, and clock generators in particular, Chapter II overviews the necessary background information required for a more in-depth analysis. Chapter III examines the concept of phase jitter, discussing its origin, its effects on a synchronous circuit, and an analytical method for calculating phase jitter. The chapter concludes by introducing a method for simulating the frequency instability of a clock generator due to phase jitter. Chapter IV is the first of three chapters discussing clock generator designs. The design described in this chapter was fabricated in Motorola's Complementary GaAs (CGaAs) process. Chapter V details the design and test of a low voltage, high frequency clock generator that exhibits low phase jitter.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 1998
- Accession Number
- ADA365139
Entities
People
- Philip S. Stetson
Organizations
- University of Michigan