Fabrication of Sub-5nm Silicon Nano-Wires and Nano Devices
Abstract
A reproducible process for fabricating silicon nanowires down to 4nm in diameter has been developed. The process, as described in previous reviews, relies on the stress limited oxidation of a thin silicon line. The initial line is fabricated by patterning an SOI wafer using electron beam lithography and a NiCr lift-off process. The post-oxidation wire was found to be very sensitive to crystallographic orientation of the line, its height/width aspect ration, and the presence of the supporting substrate.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 28, 2000
- Accession Number
- ADA381159
Entities
People
- Jeffrey Bokor
Organizations
- University of California, Berkeley