Asynchronous Systems Architecture Project
Abstract
The main result of this research has been to design a new method for high-performance asynchronous circuits based on very fine pipelining. The method has been demonstrated successfully through the design of two main chips: an asynchronous lattice-structure digital filter and the MiniMIPS. With 2 million transistors, the asynchronous MiniMIPS is probably the largest VLSI chip and the fastest microprocessor successfully designed in academia. It was found to be entirely functional on first silicon. It is about two and one half the performance of commercial microprocessors of the same type and in equivalent technologies. Performance in excess of 400 MIPS are expected in TSMC's 0.25 micron CMOS technology, which is remarkable given that the processor issues instructions one at a time while all processors in this performance range use multiple instructions issue.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 2000
- Accession Number
- ADA384432
Entities
People
- Alain J. Martin
Organizations
- California Institute of Technology