InAs HVT for Extremely Low Power and High Speed Applications
Abstract
Detailed experiments were carried out to establish the working epitaxial layer structure for the InAs high velocity transistors (InAs HVT). Appropriate InAlAsSb barrier and high purity InAs were incorporated into the final InAs HVT transistor structure. Molecular beam epitaxial (MBE) growth parameters were optimized for the InAs HVT. InAs HVT has been achieved, showing the first such vertical structure with world record transconductance and high speed device parameters. The input, output, and transfer characteristics of an InAs HVT in the common-base configuration were characterized. All the device characteristics were much improved than any previous established results, thus confirming the advantages of the innovative InAs HVT device design.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 22, 2005
- Accession Number
- ADA438567
Entities
People
- Wen I. Wang
Organizations
- Columbia University