An Analysis of Software Interface Issues for SMT Processors

Abstract

Simultaneous Multithreading (SMT) has progressed from concept to commercial technology. This thesis explores three software interface issues on SMT. These issues are: operating system performance on SMT, the impact of spinning on SMT, and register file limitations to scaling SMT. We investigate these issues with a new, detailed simulation infrastructure capable of modeling all operating system activity. First, we present an analysis of operating system execution on SMT. We compare Apache's user- and kernel-mode behavior to a multi-programmed SPECInt workload. Our results demonstrate the micro-architectural impact of an OS-intensive workload on an SMT processor. The synergy between the SMT processor and Web and OS software produces a greater throughput gain over superscalar execution than seen on any previously examined workloads. Second, we study the cost of synchronization on SMT. Spinning can exact a large performance cost on SMT, because all threads share execution resources. We quantify the impact of spinning on SMT and the performance benefit of replacing spinning with SMT-lock-based code. We observe that spinning's degradation of performance ranges widely between more than 3x on multi-programmed workloads to a negligible amount on the Apache workload. Finally, we explore architectural register sharing on SMT. A significant impediment to the construction of SMTs larger than two or four contexts is register file size. We introduce and evaluate mini-threads, a simple extension to SMT that increases thread-level parallelism without the commensurate increase in register hardware. A mini-threaded SMT CPU adds additional per-thread state to each hardware context; an application executing in a context can create mini-threads that will utilize its own per-thread state, but share the context's architectural register set. Our results quantify the factors affecting performance in detail and demonstrate that mini-threads can improve performance significantly.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 2002
Accession Number
ADA480391

Entities

People

  • Joshua A. Redstone

Organizations

  • University of Washington

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Cognitive Systems Engineering
  • Computer Architecture
  • Computer Programming
  • Computer Science
  • Computers
  • Computing System Architectures
  • Instruction Set Architecture
  • Instrumentation
  • Kernels (Operating System)
  • Language
  • Measurement
  • Operating Systems
  • Programming Languages
  • Scheduling (Production)
  • Simulations
  • Simulators

Fields of Study

  • Computer science

Readers

  • Materials Science.
  • Parallel and Distributed Computing.
  • Systems Analysis and Design