On Large-Scale Hybrid Computing Architecture for Neocortical Models - With an Application in Realizing Cognizance Operations of the Visual Cortex
Abstract
This report describes working hardware and software developed to realize large-scale Brain-State-in-a-Box (BSB) models on a workstation with hardware acceleration using a Field Programmable Gate Array (FPGA). Just one Xilinx XC2VP70 FPGA was able to support about 600 128-dimensional BSB models to run at 10ms reaction time. Software was developed that controls the hardware operations and sends/receives data through publish/subscribe routines provided by an open-source package. Next, the confabulation based knowledge base training function on the Cell Broadband Engine (CBE) was implemented. The workload of the training function was distributed to 6 Synergistic Processing Elements (SPEs) in the Cell processor. Dynamic memory management techniques were developed to enable the SPE to load and write back information from/to the main memory during the training process. Preliminary software profiling was performed to indicate the performance bottleneck and guide the software optimization. The Cell-based implementation achieved 4X~9X speedups comparing to traditional processors.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 2008
- Accession Number
- ADA491532
Entities
People
- Qing Wu
- Qinru Qiu
Organizations
- Binghamton University