JCR VSIL Interoperability Testing
Abstract
The Joint Center for Robotics (JCR) Virtual Systems Integration Lab (VSIL) is a combination of Robotics Software Models and Tools used to stimulate Hardware or perform evaluations on developing concepts. The models have been developed at the Tank Automotive Research, Development Engineering Center (TARDEC) or other RDECOM labs and centers. JCR VSIL is focusing on supporting the Robotic Systems Joint Project Office (RS JPO) in testing of their developing Interoperability Profiles for FY1O. The RS JPO Interoperability Profiles will need a facility for testing compliance to the profile attributes. The JCR VSIL is building the testing compliance facility in coordination with the development of the Profiles. The first demonstration is planned for May, 2010. This demonstration will measure the latency of controller(s) to simulated and 'live' robotics platform(s) using the RS JPO Interoperability Profile using JAUS AS-4 message standard Simulated SUGV will respond to mobility, manipulator and pose control operational messages. A message analyzer will verify the correct message is being passed. A simulated TALON will also be measured through a series of JAUS AS-4 messages. 'Live' hardware will consist of TARDEC Intelligent Ground Systems (IGS) Robotics Autonomous Mobility Platform (RAMP) pan/tilt sensor and operator sensor (Software surrogate may be just prototype discovery / authentication services). The Interoperability Profile will be executed using two different OCUs to manipulate the virtual and 'live' hardware. This paper will discuss the tradeoffs, architecture and design of the testing system and hardware in support of the May demonstration.
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 01, 2009
- Accession Number
- ADA531717
Entities
People
- Joshua Walters
- Paul Bounker
- Tim Lee
Organizations
- United States Army Tank Automotive Research, Development and Engineering Center