Coherent Distributed Radar for High-Resolution Through-Wall Imaging
Abstract
In this performance period we performed the first measurements with the digital synchronization transceiver hardware. We have characterized the tenability and stability of the reference clocks used to clock the transceiver's digital hardware. We have tested the ADC board, and have discovered several issues with its performance. We have completed the redesign of the ADC board to address these issues. The RF front-end is in manufacture now, and will be tested shortly. We have finalized our approach to frequency synchronization which addresses the effects of multipath and mobility. We have tested the frequency synchronization algorithm in a loopback test on the digital transceiver hardware. We are designing a final demonstration using the synchronization transceiver and in-house radar- and high-precision hardware.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 2010
- Accession Number
- ADA532820
Entities
People
- Eric Van Doorn
- Satya Ponnaluri