Foundation of a Heterogeneous Electronics Integration Platform
Abstract
Due to increasing complexity, multi-material incompatibilities, and size constraints of electronics, no single monolithic technology can adequately realize the full spectrum of Army-relevant applications. The integration of a wide range of devices, each fabricated in different technologies and performing a well-defined task, would enable the construction of high performance systems. We use a custom microfabrication process flow to align dies within a silicon template wafer to obtain a common planar surface between them. The resulting silicon wafer with embedded chips would then be compatible with the U.S. Army Research Laboratory s (ARL) high quality factor (Q), state-of-the-art multilevel copper electroplating process. This approach permits high density interconnects and through silicon vias, reduces pad parasitics and allows researchers to construct highly miniaturized, modular heterogeneous platforms for Army systems. Future work will include testing and characterization of prototype heterogeneously integrated designs.
Document Details
- Document Type
- Technical Report
- Publication Date
- May 01, 2012
- Accession Number
- ADA563039
Entities
People
- Alma Wickenden
- Christopher D. Meyer
- Sarah S. Bedair
- Scott Trocchia
- Tony Ivanov
- William Benard
Organizations
- United States Army Research Laboratory