Scalable Multiplexed Ion Trap Fabrication Using Ball Grid Arrays
Abstract
State-of-the art micro-fabricated ion traps for quantum information research have grown to incorporate upwards of a hundred control electrodes. In the typical architecture, a surface-electrode ion trap is fabricated on a thin chip that sits atop an industry standard CPGA carrier. To supply DC potentials for each electrode, pads on the CPGA are wirebonded to pads on the trap chip, while on-chip surface capacitors suppress pickup from the RF trapping fields. For large numbers of electrodes, the physical area taken up by these wirebonds and filter capacitors present significant constraints for ion trap design and operation. We report here on the development and successful testing of a new architecture for microfabricated ion traps, built around ball-grid array (BGA) connections and trench capacitors. In the BGA trap, through-substrate vias (TSVs) are used to bring electrical signals from the back side of the trap die to the top side. Gold-ball bump bonds connect the back side of the trap die to a separate interposer for signal routing from the CPGA carrier. Trench capacitors fabricated into the trap die eliminate the need for surface capacitors, reducing the trap die area by 30x.
Document Details
- Document Type
- Technical Report
- Publication Date
- Oct 31, 2014
- Accession Number
- ADA623670
Entities
People
- Alexa Harter
- Curtis Volin
- Dan Youngner
- James Goeders
- Jason Amini
- Matt Marcus
- Matthew Jungwirth
- Nicholas D. Guise
- Spencer D. Fallek
- Thomas Ohnstein
Organizations
- Georgia Tech